1. Field of the Invention
The present invention generally relates to semiconductor test apparatuses and methods using the same and, more particularly, to a semiconductor test apparatus and a method using the same for testing a semiconductor chip and a semiconductor device (tested device) having plate connection terminals.
Recently, demands are mounting for high-density, high-speed and compact semiconductor devices. According to a mounting method widely used in the art in order to meet these demands, a plurality of pre-packaged semiconductor chips (so-called bare chips) or a plurality of semiconductor devices having a ball grid array (BGA) structure are mounted directly on a circuit board.
In such a mounting method, the entirety of the device would be defective if one of the plurality of bare chips or semiconductor devices is abnormal. Therefore, high reliability in each bare chip or semiconductor device is required.
Accordingly, a growing importance is being attached to a test for examining whether an individual bare chip or semiconductor device is functioning normally.
2. Description of the Related Art
Hereinafter, pre-packaged bare chips and resin-packaged semiconductor devices are inclusively referred to as semiconductor devices. Currently, various methods for testing a semiconductor device having plate connection terminals flush with a lower major surface of the device or relatively depressed therefrom have been proposed and practiced.
In testing electrical operation of such a semiconductor device, it is necessary to ensure that each of the plate connection terminals is in contact with a test probe of a test apparatus. Cares must be taken so that the plate connection terminals remain largely intact. Moreover, such a test should be reliable and should require a relatively low cost.
One of the most widely used test methods is a method using a probe. In this method, a plurality of probes are provided on a test substrate so as to correspond to a plurality of plate connection terminals formed on the lower major surface of a semiconductor device. A test is conducted by causing an end of each of the probes to be in direct contact with the corresponding plate connection terminal.
For this purpose, a semiconductor test socket having a plurality of probes provided with the same arrangement as the plurality of plate connection terminals of the semiconductor device is used. A U-shaped deflected part is provided in the probe. When the end of the probe is in contact with the plate connection terminal of the semiconductor device and pressed thereby, the deflected part is deformed so as to reduce damage to the plate connection terminal.
However, such a method of testing electrical performance of a semiconductor device has an inherent problem in that, as the number of terminals increases in the semiconductor device as a result of a high-density arrangement, it is difficult to arrange the probes in close proximity to each other. Connection between the end of the probe and the plate connection terminal may not be satisfactory, resulting in a drop in precision of the test. Also, manufacturing of a test apparatus having probes provided at close proximity to each other is difficult and requires a considerable cost.